The 1.485Gb/s HDTV SDI interface
The 1.485Gb/s HDTV SDI interface
Table 1. The source-format parameters are identified as A through M and are referenced to four SMPTE standards. Click here to see an enlarged diagram.
The SMPTE Standard 292M, Bit-Serial Digital Interface for High Definition Television Systems, describes the manner in which various HDTV formats, including the exclusively North American 1280¡Á720, are organized to achieve a common serial bit-rate. Table 1 details the essential source-format parameters. They are identified as A through M and are referenced to four SMPTE standards as follows:
- SMPTE 260M: The legacy HDTV format with 1125 lines per total frame, 1035 active lines per frame 2:1 interlaced with a 30Hz or 30/1.001Hz (NTSC-friendly) frame rate.
- SMPTE 259M: A European HDTV format with 1250 lines per total frame, 1080 active lines per frame 2:1 interlaced with a 25Hz frame rate.
- SMPTE 274M: A family (ever expanding) of 1125 lines per total frame, 1080 active lines formats.
- SMPTE 296M: A uniquely North American HDTV format with 750 lines per total frame, 720 active lines per frame progressively scanned with a 60Hz or 60/1.001Hz (NTSC-friendly) frame rate.
Figure 1. Conceptual block diagram of an HDTV serializer. The HDTV serializer performs coprocessing, data multiplexing, parallel-to-serial conversion, scrambling and NRZ-to-NRZI conversion. Click here to see an enlarged diagram.
All formats are transmitted using the same nominal 1.485Gb/s serial bit rate. This is obtained by adjusting the number of total lines per frame and words per total line while maintaining the appropriate number of total active lines per frame and words per active line. All nominal frame rate formats (A, C, D, F, G, I, J, L) are operating at a bit-serial data rate of 1.485Gb/s. Formats with an NTSC-friendly frame rate (B, E, H, K, M) operate at 1.4835Gb/s (1.485/N). The divisor N has a value of 1.001. The difference between the two data rates is negligible. This article focuses on the D format that is typical of other formats.
The source data
The D format source data consists of two bit-parallel data streams operating in tandem:
- A bit-parallel Y data stream with a resolution of 10 bits per sample and a data rate of 74.25Mwords/sec.
- A bit-parallel time-division-multiplexed CB/CR data stream with a resolution of 10 bits per sample and a data rate of 74.25Mwords/sec.
Figure 2. Formation of Y, CB, CR multiplexed data stream from separate Y and CB/CR data streams. Click here to see an enlarged diagram.
Get the TV Tech Newsletter
The professional video industry's #1 source for news, trends and product and tech information. Sign up below.
Each of the two data streams carries the following data in the horizontal blanking interval:
- Its own set of 4-word end of active video (EAV) and start of active video (SAV) timing reference signals (TRS) for a total of eight words. In a manner similar to that used with the SDTV format, described in SMPTE 259M, each TRS comprises three synchronizing words (3FF, 000, 000) and a fourth XYZ word. The XYZ word of each of the two data streams carries the F, V, H information as well as the P0, P1, P2 and P3 protection bits.
- Two words of line data (LN0 and LN1) with line number information in a binary code.
- Two words of cyclic redundancy codes (CRC). Two separate CRCs are calculated for the luminance data (YCR0 and YCR1) and color difference (CCR0 and CCR1).
The serializer
Figure 1 shows a conceptual block diagram of an HDTV serializer. The serializer performs several functions:
Figure 3. Conceptual block diagram of HDTV deserializer. The deserializer performs cable-loss equalization, serial clock recovery, NRZI-to-NRZ conversion, descrambling, serial-to-parallel conversion and demultiplexing. Click here to see an enlarged diagram.
- Coprocessing: Each of the two bit-parallel data streams is fed to a coprocessor, which inserts line number and CRC data. An additional coprocessor may be used to insert ancillary data.
- Data multiplexing: The formatted bit-parallel data streams feed a multiplexer. The two 74.25Mwords/sec bit-parallel data streams Y and CB/CR are multiplexed word-by-word into a single 148.5Mwords/sec 10-bit parallel data stream in the order CB, Y, CR, Y, CB, Y, CR, Y and so on as shown in Figure 2. In this drawing, the first row shows details of the horizontal blanking interval of the Y data stream. The second row shows details of the multiplexed CB/CR data stream. The structure of the multiplexed Y, CB, CR data stream is shown in the bottom row.
- Parallel-to-serial conversion: The output of the multiplexer feeds a parallel-to-serial converter whose output is an non-return-to-zero (NRZ) coded bit-serial data stream with a 1.485Gb/s bit rate.
- Scrambling: The NRZ bit-serial signal feeds a scrambler, which randomizes long sequences of ¡°zeros¡± and ¡°ones.¡±
- NRZ-to-NRZI conversion: The scrambled NRZ data stream feeds an NRZ-to-NRZI converter, which converts long runs of ones to transitions, thus further helping the clock recovery process in the receiver.
The deserializer
Figure 3 shows a conceptual block diagram of a deserializer. The deserializer performs several functions:
Table 2. Transmitter and receiver characteristics of bit-serial interfaces. Click here to see an enlarged diagram.
- Cable-loss equalization: An automatic cable-loss equalizer corrects for high-frequency (¡Ý8MHz) and low-frequency (<8MHz) losses introduced by the coaxial cable. The equalization capability is a manufacturer's choice. Some circuits are capable of automatically equalizing losses introduced by up to 100 meters of Belden 1694A coaxial cable. If a safety margin of 15 meters is taken into consideration, the capability of the equalizer is on the order of 85 meters of cable length. For longer distances, coaxial cables have to be replaced with fiber-optic distribution systems.
- Serial clock recovery: The bit-serial signal is self-clocking. The receiver contains a clock regenerator that recreates the clock through a phase-locked loop (PLL) and a voltage-controlled oscillator (VCO). The PLL bandpass is a compromise between noise rejection (narrow bandpass) and pull-in range (wide bandwidth). It is typically 2MHz. The clock regenerator uses the received scrambled NRZI signal ahead the recovery of the original NRZ signal.
- NRZI-to-NRZ conversion: A reverse process recovers the NRZ signals by restoring the original long sequences of ones.
Figure 4. Eye diagram parameters. Click here to see an enlarged diagram.- Descrambling: A reverse process removes the random transitions introduced by the scrambler in the serializer to recover the original NRZ signal.
- Serial-to-parallel conversion: Recovers the original 148.5Mwords/s time-division-multiplexed Y, CB, CR data stream.
- Demultiplexing: Recovers the original Y and CB/CR data streams.
Performance specifications
Table 2 summarizes the characteristics of the HDTV bit-serial interface and the tolerances on the performance-indicative parameters. They refer to a typical ¡°eye diagram¡± waveform. (See Figure 4.)
Michael Robin, a fellow of the SMPTE and former engineer with the Canadian Broadcasting Corp.'s engineering headquarters, is an independent broadcast consultant located in Montreal, Canada. He is co-author of Digital Television Fundamentals, published by McGraw-Hill, and recently translated into Chinese and Japanese.
>Send questions and comments to:michael_robin@primediabusiness.com
The Second Edition of Michael Robin's book may be ordered directly from the publisher by calling 800-262-4729. The book is available from several booksellers.